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Product Name: Eclipse™ Mobile Hi-brite Display
Product Description
DRS's new state-of-the-art ruggedized Digital Signal Processor (DSP) Circuit Card Assembly (CCA) is based on the Texas Instruments (TI) TMS320C6211 (Fixed-Point) and TMS320C6711 (Floating-Point) DSPs. The DSP CCA is a general-purpose data acquisition board that may be used in various applications including instrumentation, motor control, and video. The DSP CCA operates at 150 MHz, upgradeable to 167 MHz, with a 100 MHz system bus. The DSP CCA is capable of performing 1200 to 1600 MIPs or 900 MFLOPS. The DSP CCA contains 256K by 16 bit FLASH, and 64K by 32 bit Asynchronous Static Random Access Memory (ASRAM).
The DSP CCA's data acquisition includes a 300 MSPS Digital to Analog Converter (DAC) (14 bit, 2 Vp-p centered around 0 V), a quad 100 KSPS DAC (12 bit, 0 to 2.5 Vdc each), a 100 MSPS Analog to Digital Converter (ADC) (10 bit, 2 Vp-p centered around 1.25 V), and a 500 KSPS ADC (12 bit, User Configurable to either ±5 V or ±10 V input voltage range). The fast ADC is buffered with a 1K by 10 bit FIFO, and the fast DAC is buffered with a 1K by 28 bit FIFO.
The DSP CCA communicates via Controlled Area Network (CAN) bus, RS-232 bus, 32 bit wide External Memory Interface (EMIF) bus, and Host Port Interface (HPI) bus. All busses contain the necessary transceivers to communicate to the DSP CCA. The CAN bus may be removed, and the DSP's high-speed serial port, the McBSP, can be utilized.
The DSP CCA is capable of accepting two user clocks and can generate up to four clocks of 200 MHz each. The DSP CCA is capable of accepting up to 12 user-defined interrupts and 4 event triggers.
THE CE1 address space contains the FLASH and the Field Programmable Gate Array (FPGA) registers. The CE0 address space contains the SRAM. The CE2 and CE3 are totally user defined. The DSP CCA can be programmed to generate up to four external chip selects on each of the CE2 and CE3 address spaces.
The DSP CCA's FPGA is programmed in FLASH. Both the FPGA's program and the user application code may be reprogrammed in FLASH over any of the communications channels. The FPGA may be upgraded with pin for pin compatible larger FPGAs to support additional user requirements. This capability allows the end user the flexibility to change the DSP's hardware and software to meet user applications needs.
With all this, the DSP CCA is only 3.15 inches wide by 2.9 inches long and consumes less than 5 watts of power. The DSP CCA can even take its own temperature with accuracies of 3°C.
Company Details
DRS Technologies, Inc., headquartered in Parsippany, New Jersey, U.S.A., is a
leading supplier of integrated products, services and support to military
forces, intelligence agencies and prime contractors worldwide. Focused on
defense... more
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