Description
Space Dynamics Laboratory is seeking a highly skilled electrical engineer to perform detailed designs of high reliability electronics systems and subsystems. Will use state-of-the-art Mentor Graphics CAD tools to design and model high speed digital data processing FPGA based hardware systems. Will remain on task from concept through design, implementation, test, and delivery. Work will include chip, board level and systems design. Will work with small to large teams of engineers producing high reliability high quality instrumentation.
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Job Information |
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Job Title:
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Design Verification Engineer |
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Employer:
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USU Space Dynamics Laboratory |
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Job Category: |
Engineering/Architecture |
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Experience: |
2-5 Years Experience |
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Salary: |
Unspecified |
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Desired Education: |
Bachelor of Science |
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Location:
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Logan, UT |
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Date:
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July 14, 2007 |
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Job Type:
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Full-Time, Employee |
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Job
Requirements:
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Requirements: Must have a BSEE, MSEE desired. The job
requires a minimum of 4 years experience, 8 years preferred, in
the field of FPGA based digital electronics design and
development, with demonstrated proficiency in VHDL or similar
firmware development languages and software development tools.
Experience in the following areas is highly desirable:
Experience with data networks including protocols such as SONET
and FibreChannel. Design experience with Actel, Altera, Xilinx
integrated circuits; experience with Mentor Graphics FPGA
development and Model Sim simulation software. Experience in high
reliability design for space borne systems a plus. Candidate must
be able to obtain a U.S. security clearance. Willing to travel on
a regular basis and work off-site for extended periods of time.
Qualified applicants should submit a resume and cover letter by
August 3rd, to: USURF, H.R.Dept., 1695 N. Research Prkwy, N.
Logan, UT, 84341, or fax (435) 797-4328, or E-mail to:
employment@usurf.usu.edu |
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Category: Elecrtical Engineering Country: United States
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